Multiprocessor system having plural memory locations for...

Details Multiprocessor system having plural memory locations for... Multiprocessor system having plural memory locations for...

2007-10-09

2007-10-09

Kim, Matthew (Department: 2186)

Electrical computers and digital processing systems: memory

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Reexamination Certificate

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10903200

ABSTRACT:
The present invention provides a multiprocessor system and method in which plural memory locations are used for storing TLB-shootdown data respectively for plural processors. In contrast to systems in which a single area of memory serves for all processors' TLB-shootdown data, different processors can describe the memory they want to free concurrently. Thus, concurrent TLB-shootdown request are less likely to result in performance-limiting TLB-shootdown contentions that have previously constrained the scaleability of multiprocessor systems.

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