Multiprocessor system having mapping table in each node to map g

Details Multiprocessor system having mapping table in each node to map g Multiprocessor system having mapping table in each node to map g

1996-07-01

1999-04-27

Chan, Eddie P.

Electrical computers and digital processing systems: memory

Address formation

Address mapping

711147, G06F 1210

Patent

active

058976647

ABSTRACT:
In a multiprocessor computing system, virtual memory addresses are mapped to local physical memory addresses of an attraction memory, containing a replication of the data contained at remote physical addresses, in a node of the system. A mapping table is created and maintained in each node of the system to supplement a conventional page table. The mapping table is used to map a global physical address to a local physical address of the replicated page of memory. System performance is enhanced by subsequent access to the data stored at the local physical address, as opposed to the remote physical address.

REFERENCES:
patent: 5117350 (1992-05-01), Parrish et al.
patent: 5247629 (1993-09-01), Casamatta et al.
patent: 5274789 (1993-12-01), Costa et al.
patent: 5361340 (1994-11-01), Kelly et al.
patent: 5592625 (1997-01-01), Sandberg
patent: 5649141 (1997-07-01), Yamazaki
patent: 5710907 (1998-01-01), Hagersten et al.
Hagersten, Erik et al. "DDM--A Cache-Only Memory Architecture". Swedish Institute of Computer Science. IEEE. 1992.

Affiliated with

Also associated with

Rating

Multiprocessor system having mapping table in each node to map g does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multiprocessor system having mapping table in each node to map g, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multiprocessor system having mapping table in each node to map g will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-683334