Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2005-05-10
2005-05-10
Padmanabhan, Mano (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S119000, C711S147000, C707S793000
Reexamination Certificate
active
06892280
ABSTRACT:
In multiprocessing system executing processing called NUMA prefetch, when a prefetch instruction is issued to a prefetch unit, an address converter converts an address specified by an operand of the instruction into a physical address. A prefetch type determiner determines whether the instruction is an NUMA prefetch instruction or a conventional perfect prefetch instruction. If the instruction is an NUMA prefetch instruction, an address determiner determines whether the physical address is a local address or a remote address. If the address is a local address, the processing of the prefetch instruction is terminated. If the address is a remote address, a cache tag checker checks a cache. When cache hit occurs, the processing is terminated. When cache mishit occurs, a prefetch request is issued to a main storage controller. As a result, data is prefetched from a remote main storage to a cache in a local main storage.
REFERENCES:
patent: 5623608 (1997-04-01), Ng
patent: 6615322 (2003-09-01), Arimilli et al.
patent: 10-283192 (1997-04-01), None
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A. Marquez, Esq. Juan Carlos
Fisher Esq. Stanley P.
Ho Thang
Padmanabhan Mano
Reed Smith L.L.P.
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