Electrical computers and digital processing systems: support – Digital data processing system initialization or configuration – Loading initialization program
Reexamination Certificate
1999-12-30
2003-04-29
Lee, Thomas (Department: 2185)
Electrical computers and digital processing systems: support
Digital data processing system initialization or configuration
Loading initialization program
C714S002000
Reexamination Certificate
active
06557099
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a multiprocessor system in which a plurality of processors are interconnected and, more particularly, to a system restarting operation at processor failure.
2. Description of the Related Art
To enhance reliability and service by means of functional distribution and load distribution, a multiprocessor system interconnecting a plurality of processors is used. In the case of switching systems, call processing is load-distributed between two or more processors to enhance the processing speed for example. If, in such a multiprocessor system, two or more processors fail or a processor indispensable for service provision fails, the service provision is hindered. Therefore, in order to restore the failed system by instructions from one processor, a particular processor (hereafter referred to as a system control processor) is adapted to issue instructions to initialize all other processors in the system (this initialization is hereafter referred to as system restart). Conventionally, the capability of escalating the system to system restart is installed only on a fixed processor (for example, in the case of switching systems, the main processor (MPR) for maintenance control. To be more specific, because the fixed processor conventionally performs the escalation to system restart, if the fixed processor itself fails and left as it is, it cannot perform system restart control if another processor fails. Therefore, shift to system restart is made to restore the failing fixed processor and initialize the entire system.
As described, conventionally, the escalation to system restart is made upon failure of the system control processor, thereby initializing the entire system. Consequently, even if the service provision can be continued only by the processors other than the system control processor, the failure of the system control processor presents a problem in the service continuation for the escalation to system restart. Furthermore, a technology is known in which, when stopping a master computer (or a system control processor), another computer is instructed to succeed the master computer, as disclosed in Japanese Patent Laid-open No. Sho 59-62967. However, this technology requires for the master computer to issue an instruction to the succeeding computer to shift the master capability thereto, thereby presenting a problem in the continuation of system operation.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a multiprocessor system that provides good service continuation.
In accordance with an aspect of the present invention, there is provided a multiprocessor system in which a plurality of processor systems including processors assigned with unique processor numbers are interconnected by a processor connection facility, each of the plurality of processor systems comprising: first storage means for storing a number of a failing processor among the processors; first notice acceptance means for accepting through the processor connection facility a first notice of the failing processor number of another processor and writing the failing processor number to the first storage means; second notice acceptance means for accepting a second notice of initialization from another processor system through the processor connection facility to initialize own processor; notice means for issuing a third notice of the initialization to all other processor systems through the processor connection facility; system control processor analysis means for determining, on the basis of the failing processor number stored in the first storage means, a system control processor from among the normally operating processors; and system restart control means for instructing the notice means to issue the third notice and initializing own processor if own processor matches the system control processor determined by the system control processor analysis means when system restart has been determined to be performed on the basis of the failing processor number stored in the first storage means.
The above and other objects, features and advantages of the present invention and the manner of realizing them will become more apparent, and the invention itself will best be understood from a study of the following description and appended claims with reference to the attached drawings showing some preferred embodiments of the invention.
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patent: 6079033 (2000-06-01), Jacobson et al.
patent: 6178445 (2001-01-01), Dawkins et al.
patent: 6360333 (2002-03-01), Jansen et al.
patent: 56-40935 (1981-04-01), None
patent: 59-62967 (1984-04-01), None
G. Singh, Leader Election in the Presence of Link Failures, IEEE Transactions on Parallel and Distributed Systems, vol. 7, No. 3, Mar. 1996, pp. 231-236.*
A. Arora, Distributed Reset, IEEE Transactions on Computers, vol. 43, No. 9, Sep. 1994, pp. 1026-1038.
Fujitsu Limited
Katten Muchin Zavis & Rosenman
Lee Thomas
Nieves Michael
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