Multiprocessor system for decrypting and resuming execution...

Electrical computers and digital processing systems: support – Computer power control – Power conservation

Reexamination Certificate

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Details

C713S300000, C713S320000, C713S323000

Reexamination Certificate

active

07409570

ABSTRACT:
One or more processors within a computing system and the processor(s)' associated local memories may be operatively connected to a main memory enabling data transfer between the main memory and the local memories, in which the computing system can carry out actions that may include: generating a pause condition for one or more processors within a computing system; pausing the one or more processors; saving data from a local memory of the one or more processors to the main memory; hibernating the one or more processors; restoring power to the one or more processors; transferring the saved data originating from the one or more processors back to one originating processor or to designated destination processors in the computing system.

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International Search Report and Written Opinion based on corresponding PCT/JP2006/309616, dated Feb. 5, 2007, 20 pgs.
Invitation to Pay Additional Fees commenting on prior art based on corresponding international application PCT/JP2006/309616, dated Nov. 7, 2006, 8 pgs.

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