Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1997-02-04
1999-04-20
Lall, Parshotam S.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711203, 39520045, G06F 15167
Patent
active
058965017
ABSTRACT:
A parallel processing apparatus and method for processing data transferred between a plurality of processors each having a storage. Each of the plurality of processors corresponds a global virtual address in a global virtual memory space where a parallel processing between the plurality of processors is performed and a local virtual address in a local virtual memory space where an individual process in one of the processors is performed to an identical real address. Data is transferred from a first one of the plurality of processors to a second one of the plurality of processors by writing the data into the storage of the second processor according to the global virtual address or the local virtual address of the second processor, the second processor is notified of the global virtual address or the local virtual address of the transferred data, the notified global virtual address or the notified local virtual address is then translated into the real address which corresponds to the notified global virtual address or the notified local virtual address, data is read from the storage of the second processor to the second processor according to the translated real address, and the read data is calculated in the second processor.
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Dewa Masami
Ikeda Masayuki
Ishizaka Ken-ichi
Kobayakawa Kazushige
Nagasawa Shigeru
Coulter Kenneth R.
Fujitsu Limited
Lall Parshotam S.
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