Multiprocessor graphics system

Details Multiprocessor graphics system Multiprocessor graphics system

1997-03-21

1998-11-24

Tung, Kee M.

Computer graphics processing and selective visual display system

Computer graphic processing system

Plural graphics processors

345505, 39520081, 39580011, G06T 120

Patent

active

058414444

ABSTRACT:
A multiprocessor graphics system having a pixel link architecture, includes: 1) a plurality of sub-graphics systems each of which assigned to each of a plurality of sub-screens provided by sectioning a display screen; and 2) a ring network for connecting the plurality of sub-graphics systems. Each of the sub-graphics systems includes a geometry engine, a raster engine, a local frame buffer and a pixel distributor. An interconnection network bottleneck between the raster engine and frame buffer is removed and a conventional memory system can be used by reducing the number of data transmissions between the raster engine and frame buffer while maintaining image parallelism and object parallelism.

REFERENCES:
patent: 5758045 (1998-05-01), Moon et al.
IEEE Computer Soc. Press, "A Multiprocessor System Utilizing Enhanced DSP's for Image processing", H. Ueda et al., pp. 611-620, May 25-27, 1988.
Proceedings of the 5th International Conference on Image Analysis and Processing, "A dataflow image processing system TIP-4", Fujita et al., pp. 734-741, Sep. 20-22, 1989.
Computer Graphics, vol. 26, "PixelFlow: High-speed rendering using image composition", by S. Molnar et al., pp. 231-240, Jul. 2, 1992.

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