Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Patent
1996-07-01
1999-11-09
Cabeca, John W.
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
711152, 711140, G06F 1200
Patent
active
059833262
ABSTRACT:
A multiprocessing system having a plurality of processing nodes interconnected by an interconnect network. A home agent is configured to service multiple requests simultaneously. A transaction blocking unit is coupled to a home agent control unit for preventing the servicing of a pending coherent transaction request if another transaction request corresponding to the same coherency unit is already being serviced by the home agent control unit. The transaction blocking unit is further configured such that read-to-share transaction requests in a NUMA mode do not block other read-to-share transaction requests in the NUMA mode.
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Hagersten Erik E.
Loewenstein Paul N.
Cabeca John W.
Kivlin B. Noel
Moazzami Nasser
Sun Microsystems Inc.
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