Multiport semiconductor memory including an address comparator

Details Multiport semiconductor memory including an address comparator Multiport semiconductor memory including an address comparator

1988-12-28

1991-07-30

Gossage, Glenn

Static information storage and retrieval

Read/write circuit

Including signal comparison

36518904, 36523005, G11C 700

Patent

active

050364910

ABSTRACT:
A multi-port-type semiconductor memory including an address comparator comprises a memory cell array which includes a plurality of memory cells arranged in rows and which includes two pairs of word lines for selecting the memory cells. The two word line pairs are driven each by one of two row decoders to which independent address signals are supplied. The address signals supplied to the two row decoders are input to the address comparator so as to detect coincidence between these signals. Further, a control circuit is provided in the semiconductor memory in order to inhibit the operation of one of the two row decoders when coincidence between the address signals is detected by the address comparator.

REFERENCES:
patent: 4577292 (1986-03-01), Bernstein
patent: 4599708 (1986-07-01), Schuster
patent: 4616347 (1986-10-01), Bernstein
patent: 4742487 (1988-05-01), Bernstein
patent: 4757477 (1988-07-01), Nagayama et al.

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