Multiport semiconductor memory device capable of...

Details Multiport semiconductor memory device capable of... Multiport semiconductor memory device capable of...

2007-01-09

2007-01-09

Zarabian, Amir (Department: 2827)

Static information storage and retrieval

Addressing

Multiple port access

C365S072000

Reexamination Certificate

active

10880530

ABSTRACT:
A 2-port SRAM includes a memory cell having: a latch circuit holding potential at storage nodes complementarily; access transistors arranged between the storage nodes and bit lines, respectively, and turned on in response to word lines being activated; a write access transistor and a storage level drive transistor arranged between the storage nodes, respectively, and a ground potential and turned on in response to a first one of the word lines being activated and a sub bit line, respectively, and a write access transistor turned on in response to a second one of the word line being activated and a storage level drive transistor turned on in accordance with a sub bit line.

REFERENCES:
patent: 6201758 (2001-03-01), Morishima et al.
patent: 6731566 (2004-05-01), Sywyk et al.
patent: 1-251384 (1989-10-01), None
patent: 2001-143473 (2001-05-01), None

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