Static information storage and retrieval – Addressing – Multiple port access
Reexamination Certificate
2005-06-21
2005-06-21
Nguyen, Tan T. (Department: 2827)
Static information storage and retrieval
Addressing
Multiple port access
C365S069000, C365S154000
Reexamination Certificate
active
06909663
ABSTRACT:
Memory cell arrays are defined by rows and columns of memory cells that are addressed by sets of bitlines associated with a first memory port and a second memory port. The bitlines associated with the first memory port have bitline exchanges associated with a first set of memory cell rows and the bitlines associated with the second memory port have bitline exchanges associated with a second set of memory cell rows. The memory cells can have the same design, and all memory cell columns can have the same design. Read/write logic for the arrays can be based on memory cell row addresses.
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Tait Marge
Vernenker Hemanshu T.
White Allen
Lattice Semiconductor Corporation
Nguyen Tan T.
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