Multiport memory device

Details Multiport memory device Multiport memory device

2006-03-09

2008-08-26

Ho, Hoai V. (Department: 2827)

Static information storage and retrieval

Addressing

Multiple port access

C365S189050, C365S230080, C365S233100

Reexamination Certificate

active

07417915

ABSTRACT:
A multiport memory device according to an embodiment of the invention includes first and second input ports, first and second output ports, and a memory cell array. The device further includes: an input data selector for selecting one of the first and second input ports to send input data to the memory cell array; and an output data selector for selecting one of the output ports to output the data from the memory cell array to the selected output port. The device further includes a clock doubling circuit for supplying a doubled clock to the input data selector, the output data selector, and the memory cell array. The clock doubling circuit selects a higher-frequency one of a first clock corresponding to data input from the first input port and a second clock corresponding to data input from the second input port to double its frequency to generate a doubled clock.

REFERENCES:
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patent: 7184359 (2007-02-01), Bridgewater et al.
patent: 2001/0006211 (2001-07-01), Choi et al.
patent: 2003/0218928 (2003-11-01), Tanizaki et al.
patent: 7-84987 (1995-03-01), None
patent: 8-279292 (1996-10-01), None
patent: 2004-127440 (2004-04-01), None

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