Multiport memory, data processor and data processing system

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

Reexamination Certificate

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Details

C711S167000, C711S149000, C365S233100

Reexamination Certificate

active

06996661

ABSTRACT:
A multiport memory has a plurality of RAMs and a port expansion unit electrically connected to access ports of the RAMs. The port expansion unit includes an input circuit which allows access control information for activating the RAMs in parallel every memory cycles to be collectively inputted thereto by a plurality of memory cycles, a timing generator which generates internal clock signals capable of serially prescribing each memory cycle plural times during one cycle of a clock signal (ck), and a logic circuit capable of sequentially supplying the access control information inputted to the input circuit to the plurality of RAMs in parallel in parts every serial memory cycles synchronized with the internal clock signals. The port expansion unit allows access to the access ports with the plurality of RAMs as a single multiport memory apparently.

REFERENCES:
patent: 4698753 (1987-10-01), Hubbins et al.
patent: 5422858 (1995-06-01), Mizukami et al.
patent: 5625796 (1997-04-01), Kaczmarczyk et al.
patent: 5802579 (1998-09-01), Crary
patent: 5852586 (1998-12-01), Fujita
patent: 1-251387 (1989-10-01), None

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