Multiport memory cell

Static information storage and retrieval – Addressing – Multiple port access

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Details

36518904, 365221, G11C 700

Patent

active

056445474

ABSTRACT:
A multiport memory cell has a pair of switched reference ports; a pair of banks having at least one switched read/write port; a storage element for storing a small differential voltage between one of the switched reference ports and a corresponding one of the switched read/write ports during a write operation; and a pair of amplifying elements for precharging bit line capacitances and/or providing sufficient output current during simultaneous read operations. During a read operation, the storage element is switched-on and swings high or low depending on the small differential voltage stored during the previous write operation.

REFERENCES:
patent: 4586168 (1986-04-01), Adlhoch et al.
patent: 4914630 (1990-04-01), Fujishima et al.
patent: 5062081 (1991-10-01), Runaldue
Jolly, et al., "A 9-ns 1.4-Gigabyte/s, 17-Ported CMOS Register File", IEEE Journal of Solid-State Circuits, vol. 26, No. 10 Oct. 1991.

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