Multiport memory array

Details Multiport memory array Multiport memory array

1981-04-23

1983-07-26

Popek, Joseph A.

Static information storage and retrieval

Systems using particular element

Semiconductive

365203, 365189, G11C 700

Patent

active

043957650

ABSTRACT:
In a memory array, dual port capability is achieved by an arrangement of the memory cells such that for each cycle of the memory operation two accesses may be performed. This result is achieved by taking advantage of the bit line precharging interval. A second bit line accessing pair is added to each memory element, and each cycle is split so that when one bit line is in the accessing mode, the other bit line is in the precharging mode. Using this technique the speed of the memory is effectively doubled.

REFERENCES:
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patent: 3916394 (1975-10-01), Fett
patent: 3978459 (1976-08-01), Koo
patent: 4051358 (1977-09-01), Schwartz
patent: 4125877 (1978-11-01), Reinert
patent: 4209851 (1980-06-01), Ponder
"Telephony and Signal Processing", Chapter 4, Intel Corp., 1980, pp. 4-4-16.
E. Douglas Jensen, "Mixed Mode and Multidimensional Memories", IEEE Catalog No. 72CH0659-3C, Sep. 1972, pp. 119-121.
Teuvo Kohonen, "Associative Memory", Springer-Verlag, 1977, pp. 64-65.

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