Multiport memory and method of operation thereof

Details Multiport memory and method of operation thereof Multiport memory and method of operation thereof

1991-06-27

1994-09-20

Lee, Benny

Static information storage and retrieval

Read/write circuit

Sipo/piso

365220, 365221, 365240, G11C 700, G11C 1900

Patent

active

053495616

ABSTRACT:
A multiport memory having a plurality of serial output ports includes a semiconductor memory for storing data in a plurality of memory elements arrayed in rows and columns and coupled by respective row and column connecting lines. A first register stores data read in parallel from the semiconductor memory via the connecting lines of one of the rows and columns of the arrayed memory elements and serves to supply the data stored therein in serial form to a first one of the serial output ports. The first register is also operative to supply the data stored therein in parallel to a second register for storage therein. The second register is operative to supply the data stored therein to a second one of the serial output ports.

REFERENCES:
patent: 4644502 (1987-02-01), Kawashima
patent: 4870621 (1989-09-01), Nakada
patent: 4891794 (1990-01-01), Hush et al.
patent: 4947373 (1990-08-01), Yamaguchi et al.
patent: 5014244 (1991-05-01), Lammerts et al.

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