Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2005-07-12
2005-07-12
Abraham, Fetsum (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S350000, C438S152000, C438S153000, C438S154000, C438S155000, C438S156000
Reexamination Certificate
active
06917074
ABSTRACT:
A multiplexer structure includes a semiconductor substrate having a shared diffusion region. A first gate having a first finger and a second finger is disposed on the shared diffusion region, and a second gate having a first finger and a second finger is disposed on the shared diffusion region. A contact for a first input node is disposed on the shared diffusion region between the first and second fingers of the first gate, and a contact for a second input node is disposed on the shared diffusion region between the first and second fingers of the second gate. A contact for a collector node is disposed on the shared diffusion region between the first and second gates. In operation, closing the first gate electrically connects the first input node and the collector node, and closing the second gate electrically connects the second input node and the collector node.
REFERENCES:
patent: 5744995 (1998-04-01), Young
patent: 5789791 (1998-08-01), Bergemont
patent: 5831316 (1998-11-01), Yu et al.
patent: 6020776 (2000-02-01), Young
patent: 6140682 (2000-10-01), Liu et al.
patent: 6197671 (2001-03-01), Bergemont
patent: 6809386 (2004-10-01), Chaine et al.
Cetiner, B.A. (2002) “Global Modeling Approach for Pre-Matched Multifinger FET,”Microwave and optical tech. letters, (32):174-178.
Martin, Ken (2000). “Digital Integrated Circuit Design” Chapter 2 InProcessing, Layout, and Related Issues. Oxford University Press, pp. 48-57.
Rabaey, Jan M. et al. (2003). “Digital Integrated Circuits: A Design Perspective” Chapter 9 InCoping with Interconnect. C.G. Sodini ed., Prentice-Hall of India, pp. 456-457.
Weste, Neil H. E. et al., (1994). “Principle of CMOS VLSI Design: A System Perspective” Chapter 4 InCircuit Characterization and Performance Estimation. P. S. Gordon ed., Addison Wesley Longman, pp. 186-188, 277-278.
Abraham Fetsum
Altera Corporation
Morrison & Foerster / LLP
LandOfFree
Multiplexer structure with interdigitated gates and shared... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Multiplexer structure with interdigitated gates and shared..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multiplexer structure with interdigitated gates and shared... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3381757