Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2000-09-25
2003-09-30
Beausoliel, Robert (Department: 2184)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S710000, C711S103000, C711S112000, C710S005000
Reexamination Certificate
active
06629262
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 11-279257, filed Sep. 30, 1999, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
The present invention relates to a multiplexed storage controlling device for controlling accesses to a plurality of storage devices that store the same data.
Computer systems are known in which, for example, the hard disk device is used as an external storage device. In such a computer system, to eliminate possible defects from the hard disk device, a plurality of hard disk devices are provided and the same data is stored in these hard disk devices for multiplexing so that even if one of the hard disk devices becomes defective, the data is obtained from another hard disk device and thus protected.
Such a multiplexing system for multiplexing data is known from Jpn. Pat. Appln. KOKAI Publication No. 9-27162. As shown in
FIG. 7
, this system comprises a host computer
1
, two hard disk devices
2
and
3
, a central processing unit (hereafter referred to as a “CPU”)
4
, and a bus controller
5
so that when the host computer
1
outputs a command, the CPU
4
receives and interprets it to determine whether to issue the command to one
2
or the other
3
or both
2
and
3
of the hard disk devices, depending on the type of the command. This determination is made by software for operating the CPU
4
.
If, for example, a write command is output from the host computer
1
, the CPU
4
interprets this command to issue it to both hard disk devices
2
and
3
, and based on this command, the bus controller
5
connects signal lines required to transfer data between the host computer
1
and the two hard disk devices
2
and
3
, to the corresponding hard disk devices
2
and
3
. The host computer
1
then starts to transfer data between the host computer
1
and the two hard disk devices
2
and
3
.
In the multiplexing system configured as described above, the CPU
4
judges all commands from the host computer
1
, selects a hard disk device to which the command is to be issued, based on software processing, and issues the command to the selected hard disk device. Based on the issued command, the bus controller
5
connects signal lines required to execute the command between the hard disk devices and the host computer. Further, in addition to commands, the CPU processes an error in the software, the error occurring in the hard disk device receiving the command. Since all the commands from the host computer are judged by the software inside the CPU in the above manner, a large amount of time is disadvantageously required before the command is actually executed. The host computer transmits a read command or a write command each of which requires data transfer, and commands that do not require data transfer, such as those for setting the hard disk devices. After the hard disk device has been activated, if a large amount of time is required before the read and write commands are actually executed, the entire multiplexing system disadvantageously operates at a low speed. In addition, to allow the software inside the CPU to judge all the commands and process errors in a short time, an expensive CPU with a high judgment capability is required, resulting in an expensive multiplexed storage controlling device.
BRIEF SUMMARY OF THE INVENTION
It is an object of the present invention to provide an inexpensive multiplexed storage controlling device that carries out a process for selectively connecting signal lines to each storage device to allow a command requiring data transfer from a host computer to be interpreted and executed without the need to involve a CPU, thereby reducing the amount of processing time required before the command from the host computer is actually executed by a hard disk device, to improve a processing speed of a multiplexing system.
An invention according to claim
1
is characterized by comprising command interpreting means for interpreting a command from a host computer, a command switching means for issuing the command to one or more of a plurality of storage devices that store the same data, and a central processing unit, that command interpreting means comprising a command holding section for holding the command from the host computer, a command determining section for determining whether or not the held command transfers data, and a switching signal output section for outputting, when the command determining section determines that the command involves data transfer, a selection signal for selecting a storage device to which this command is directed, outputting a notification signal to the central processing unit when the command determining section determines that the command involves no data transfer, upon receiving the notification signal, the central processing unit interprets this command involving no data transfer and outputs a selection signal for selecting a storage device to which this command is directed, the command switching means selectively connecting control lines for allowing the command to be executed, to each of the storage devices based on the selection signal from the switching signal output section or the central processing unit, in order to issue the command to the storage device to which the control lines have been connected.
The invention set forth in claim
1
can carry out a process for selectively connecting signal lines to each storage device to allow a command from a host computer to be interpreted and executed without the need to involve a CPU, thereby reducing the amount of processing time required before the command from the host computer is actually executed by a hard disk device. Consequently, an inexpensive multiplexed storage controlling device can be provided which can improve the processing speed of the entire multiplexing system even with an inexpensive CPU.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.
REFERENCES:
patent: 4084234 (1978-04-01), Calle et al.
patent: 4168523 (1979-09-01), Chari et al.
patent: 4661925 (1987-04-01), Maccianti et al.
patent: 5210842 (1993-05-01), Sood
patent: 5559994 (1996-09-01), Ando
patent: 5572659 (1996-11-01), Iwasa et al.
patent: 5887128 (1999-03-01), Iwasa et al.
patent: 6023746 (2000-02-01), Arimilli et al.
patent: 6438700 (2002-08-01), Adusumilli
patent: 2296352 (1996-06-01), None
patent: 9-27162 (1997-01-01), None
patent: WO 8605015 (1986-08-01), None
Inagaki Yasuhiro
Kato Masakazu
Yamada Katsunori
Beausoliel Robert
Frishauf Holtz Goodman & Chick P.C.
Toshiba Tec Kabushiki Kaisha
Ziemer Rita A
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