Static information storage and retrieval – Addressing – Multiple port access
Patent
1994-05-19
1996-08-06
Nelms, David C.
Static information storage and retrieval
Addressing
Multiple port access
36523001, 36523006, 365154, G11C 800
Patent
active
055441220
ABSTRACT:
Write column selection MOSFETs of memory cells MC are coupled with, for example, the earth potential of the circuit. Write column selection signals supplied to these MOSFETs are formed selectively according to the column selection address signal and the write data. Thereby the write column selection MOSFETs of the memory cells MC function as a substantial write means. That is, the write column selection signal lines are used as the data lines at the same time.
REFERENCES:
patent: 5036491 (1991-07-01), Yamaguchi
patent: 5265045 (1993-11-01), Nishio et al.
patent: 5349564 (1994-09-01), Miyake et al.
patent: 5359562 (1994-10-01), Yasui et al.
Mizukami Masao
Nakano Yukio
Sato Yoichi
Shinagawa Satoshi
Hitachi , Ltd.
Hitachi VLSI Engineering Corp.
Hoang Huan
Nelms David C.
LandOfFree
Multiplexed multi-write port semiconductor memory does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Multiplexed multi-write port semiconductor memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multiplexed multi-write port semiconductor memory will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2197150