Multiplex execution-path system

Details Multiplex execution-path system Multiplex execution-path system

2005-01-07

2008-03-04

Elamin, A. (Department: 2116)

Electrical computers and digital processing systems: support

Digital data processing system initialization or configuration

Loading initialization program

C713S001000, C713S002000, C713S100000, C714S002000, C714S006130

Reexamination Certificate

active

07340595

ABSTRACT:
A multiple execution-path flash system includes a main flash image with primary and secondary POST and Boot executable files. The secondary executables are offset from the primary executables by a predetermined offset address. If corrupted data is encountered during Boot, the exception handler sets an offset bit resulting in the predetermined offset address being added to the current instruction address. If corrupted data is encountered in the secondary executables, the offset bit is reset. An optional redundant flash image may also be used. A failure at the same relative address in the primary and secondary executables of the main flash image will cause the exception handler to transfer control to the redundant flash image. A subsequent failure at the same relative address in the primary and secondary executables of the redundant flash image will cause the redundant exception handler to transfer control back to the main flash image.

REFERENCES:
patent: 6205548 (2001-03-01), Hasbun
patent: 6754818 (2004-06-01), Lee et al.
patent: 6892323 (2005-05-01), Lin
patent: 6957328 (2005-10-01), Goodman et al.

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