Multiple valued dynamic random access memory cell and...

Details Multiple valued dynamic random access memory cell and... Multiple valued dynamic random access memory cell and...

2007-12-20

2011-11-15

Dinh, Son (Department: 2824)

Static information storage and retrieval

Systems using particular element

Capacitors

C365S222000

Reexamination Certificate

active

08059451

ABSTRACT:
Provided is a multi-valued dynamic random access memory (DRAM) cell using a single electron transistor (SET). The multi-valued DRAM cell using the SET applies different refresh signals to a load current transistor for controlling current supply to the SET and a voltage control transistor for controlling a terminal voltage of the SET and refreshes a data value stored in the SET by a predetermined period to reduce standby current and stably supply a voltage low enough to satisfy a coulomb-blockade condition to the terminal of the SET.

REFERENCES:
patent: 5249155 (1993-09-01), Arimoto et al.
patent: 6323504 (2001-11-01), Shin et al.
patent: 6597036 (2003-07-01), Lee et al.
patent: 6754101 (2004-06-01), Terzioglu et al.
patent: 10-2000-0032310 (2000-06-01), None
patent: 2006/083035 (2006-08-01), None

Affiliated with

Also associated with

Rating

Multiple valued dynamic random access memory cell and... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multiple valued dynamic random access memory cell and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multiple valued dynamic random access memory cell and... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4265386