Multiple-valued DRAM

Details Multiple-valued DRAM Multiple-valued DRAM

2006-09-11

2011-10-04

Luu, Pho M (Department: 2824)

Static information storage and retrieval

Systems using particular element

Capacitors

C365S150000, C365S189050, C365S189090

Reexamination Certificate

active

08031512

ABSTRACT:
Provided herein is an MV DRAM device for storing multiple value levels using an SET device. The device includes one or more word lines; one or more bitlines; a DRAM cell connected to intersections of the word lines and the bitlines; a current source transistor having a source connected to a power supply voltage and a gate and a drain connected to the bitlines; an SET (single electron transistor) device having a gate connected to the bitlines and a source connected to the ground voltage; and a transistor connected between the bitlines and the drain of the SET device, where the gate of the transistor is connected to the ground voltage.

REFERENCES:
patent: 5640350 (1997-06-01), Iga
patent: 5982676 (1999-11-01), Poplevine et al.
patent: 6246622 (2001-06-01), Sugibayashi
patent: 6282115 (2001-08-01), Furukawa et al.
patent: 6469923 (2002-10-01), Hidaka
patent: 7336521 (2008-02-01), Chen
International Search Report for PCT/KR2006/003610 mailed Dec. 14, 2006.
Written Opinion for PCT/KR2006/003610 mailed Dec. 14, 2006.

Affiliated with

Also associated with

Rating

Multiple-valued DRAM does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multiple-valued DRAM, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multiple-valued DRAM will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4277790