Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-11-12
2004-07-20
Abraham, Fetsum (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S386000, C257S734000, C257S401000
Reexamination Certificate
active
06765268
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device, a high-frequency power amplifying device (high-frequency power amplifying module) and a wireless communication apparatus with the high-frequency power amplifying device built therein. The present invention relates to, for example, a technology effective for application to a cellular telephone of a multiband communication system, which has a plurality of communication functions different in communication frequency band.
An AMPS (Advanced Mobile phone Service) of an analog system, which has heretofore been used and covers the North America all over the land, and a so-called dual mode cellular telephone wherein digital systems such as TDMA (time division multiple access), CDMA (code division multiple access), etc. are built in one cellular phone, have recently been used in a North American cellular market.
On the other hand, a GSM (Global System for Mobile Communication) system and a DCS (Digital Cellular System) system both using a TDMA technology and an FDD (frequency division duplex) technology have been used in Europe and the like.
“Nikkei Electronics” issued by Nikkei Business Publications, Inc., the July 26 issue in 1999 [no.748], P140 to P153 has described a dual mode cellular phone wherein a GSM whose use frequency ranges from 800 MHz to 900 MHz, and a PCN (another name for DSC) whose use frequency ranges from 1.7 GHz to 1.8 GHz, are integrated into one. The same reference has described a multi-layered ceramics-device in which passive parts are brought into integration to downsize the whole circuit.
A dualband-oriented RF power module has been described in “GAIN”, No. 131, 2000.1 issued by the Semiconductor Group of Hitachi, Ltd.
SUMMARY OF THE INVENTION
With advanced information communications, a cellular phone has also been more multi-functioned. Therefore, a high-frequency power amplifying device (high-frequency power amplifying module) built in the cellular phone has also been multi-functioned following it. In a high-frequency power amplifying device having a plurality of communication modes (including a communication band) in particular, the number of assembly parts increases as compared with a single communication mode product, and the device increases in size so that the product cost rises.
Therefore, the present inventors have discussed a size reduction in semiconductor chip in which field effect transistors (MOSFET: Metal Oxide Semiconductor Field-Effect Transistor) have been built therein, in order to bring the high-frequency power amplifying device into less size.
FIGS. 16 through 20
are respectively diagrams related to a high-frequency power amplifying device (high-frequency power amplifying module)
20
discussed in advance of the present invention, and a semiconductor chip in which transistors constituting each final amplifying stage have been built.
FIG. 19
is an equivalent circuit diagram of the high-frequency power amplifying device, and
FIG. 20
is a typical plan view showing a layout of electronic parts on a wiring board (module substrate)
21
B in the high-frequency power amplifying device
20
, respectively.
The high-frequency power amplifying device is a dualband type high-frequency power amplifying module. As illustrated in the circuit diagram of
FIG. 19
, the high-frequency power amplifying device has an amplification system P for a PCN (Personal Communications Network) system as a first amplification system, and an amplification system G for a GSM system as a second amplification system. Thus,
FIGS. 19 and 20
are shown inclusive of P as in the case of CP
1
(condenser) and RP
1
(resistor) in the PCN amplification system P, which are of symbols indicative of a capacitance (condenser) and a resistance constituting a rectifying circuit or the like, and G as in the case of CG
1
(condenser) and RG
1
(resistor) in the GSM amplification system G.
As shown in
FIGS. 19 and 20
, external electrode terminals of the amplification system P correspond to an input terminal Pin
1
, an output terminal Pout
1
and a source potential Vdd
1
, whereas external electrode terminals in the amplification system G correspond to an input terminal Pin
2
, an output terminal Pout
2
and a source potential Vdd
2
. A reference potential (Ground: GND) and a control terminal Vapc are shared. A selection as to whether either the GSM amplification system G or the PCN amplification system P should be operated, is performed under a changeover of a switch SW
1
. The switch SW
1
is changed over according to a signal supplied to a select terminal Vct
1
. The control terminal Vapc is connected to the switch SW
1
. A bias signal supplied to the control terminal Vapc serves so as to supply a bias potential to respective transistors of the GSM amplification system G according to the changeover of the switch SW
1
. Slender square portions in the circuit diagram shown in
FIG. 19
show microstrip lines respectively.
The PCN amplification system P and the GSM amplification system G are both provided in a three-stage configuration [first amplifying stage, second amplifying stage and third amplifying stage (final amplifying stage)] wherein transistors are sequentially cascade-connected. Further, the final amplifying stage takes a power combination configuration wherein two transistors are connected in parallel to increase an output. The transistors make use of MOSFETs (Metal Oxide Semiconductor Field-Effect-Transistors).
Thus, the PCN amplification system P takes a configuration wherein a transistor Q
1
, a transistor Q
2
and parallel-connected transistors Q
3
and Q
4
are sequentially cascade-connected between the input terminal Pin
1
and the output terminal Pout
1
as the first amplifying stage, second amplifying stage and final amplifying stage respectively, and constitutes a rectifying circuit on the input side, a rectifying circuit on the output side, and a circuit such as a noise filter or the like. Therefore, condensers (CP
1
through CP
13
), bypass condensers (CB
1
and CB
2
), resistors (RP
1
through RP
4
), and an inductor L
1
are disposed in respective locations as discrete parts.
Gate electrodes used as control electrode terminals of the transistors Q
1
through Q
4
are respectively supplied with a signal to be amplified and a bias potential. The bias potential is a signal supplied to the control terminal Vapc as described above. This signal is supplied to the PCN amplification P or the GSM amplification G by being selected by the switch SW
1
. The switch SW
1
is changed over based on the signal supplied to the select terminal Vct
1
to thereby perform such a selection. The potentials supplied to the respective gate electrodes are respectively defined according to predetermined bias resistors.
First electrode terminals (drain electrodes) of the transistors Q
1
through Q
4
are supplied with the source potential Vdd
1
. An amplified signal is outputted to the first electrode terminal of each transistor. Second electrode terminals (source electrodes) of the respective transistors are respectively supplied with the reference potential (GND).
The GSM amplification system G takes a configuration wherein a transistor Q
5
, a transistor Q
6
and parallel-connected transistors Q
7
and Q
8
are sequentially cascade-connected between the input terminal Pin
2
and the output terminal Pout
2
as the first amplifying stage, second amplifying stage and final amplifying stage respectively, and constitutes a rectifying circuit on the input side, a rectifying circuit on the output side, and a circuit such as a noise filter or the like. Therefore, condensers (CG
1
through CG
13
), bypass condensers (CB
3
and CB
4
), resistors (RG
1
through RG
4
), and an inductor L
2
are disposed in respective locations as discrete parts.
Gate electrodes used as control electrode terminals of the transistors Q
5
through Q
8
are respectively supplied with a signal to be amplified and a bias potential. First electrode terminals (drain electrodes) of the transistors Q
5
through Q
8
are s
Adachi Tetsuaki
Akamine Hitoshi
Suzuki Masashi
Yamane Masao
Abraham Fetsum
Miles & Stockbridge P.C.
Renesas Technology Corp
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