Abrading – Abrading process – Combined abrading
Reexamination Certificate
2002-02-01
2003-12-16
Nguyen, George (Department: 3723)
Abrading
Abrading process
Combined abrading
C451S041000, C451S065000, C451S285000
Reexamination Certificate
active
06663472
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Technical Field
This invention relates generally to an apparatus and method for planarizing semiconductor substrates during the manufacture of integrated circuits, and more particularly, to a polishing apparatus which facilitates the use of two distinct polishing slurries for a two-step chemical mechanical polishing process.
(2) Description of the Prior Art
The fabrication of integrated circuits on a semiconductor substrate involves the forming of a multiplicity of sequential layers involving a number of photolithographic process steps for each layer. The process forms window patterns in selected areas on the substrate, usually through a deposited insulating layer, for subsequent operations such as inclusion of impurities, oxidation, forming trenches, inlaying conductive metals, etc.
During the forming of the integrated circuit structures, it has become increasingly important to provide structures having multiple metallization layers due to the continuing miniaturization of the circuit elements in the structure. Each of the metal layers is typically separated from another metal layer by an insulation layer, such as an oxide layer. To enhance the quality of an overlying metal layer, one without discontinuities of other blemishes, it is imperative to provide an underlying surface for the metal layer that is ideally planar. The process of planarizing is now a standard process application of integrated circuit manufacturers.
To meet the needs for larger scale integration, which demands more metal and oxide layers in devices, the surface topography of the substrate must exhibit exact depth of focus for sub-micron lithography. Continued improvements in present polishing processes are essential. Chemical mechanical polishing (CMP) was developed and is presently used by most major semiconductor manufacturers. CMP is a method of polishing materials, such as semiconductor substrates and precision optical components, to a high degree of planarity and uniformity. The process is used to initially planarize semiconductor slices and is also used to remove uneven topography created during the forming of the sub-micron circuitry on the substrate. Where the substrate is to be further processed, such as by photolithographic etching to create integrated circuit structures, any thickness variation in the planarized layer makes it extremely difficult to meet the fine resolution tolerances required to provide high yield of functional die on a substrate.
A conventional CMP process involves supporting and holding the substrate against a rotating polishing pad that is wet with a polishing slurry and at the same time applying a pressure against the rotating pad. The pH of the polishing slurry controls the chemical reaction, for example, the oxidation of the chemicals that make up the insulating layer of the substrate. The polishing pad is typically made from non-fibrous polyurethane or a polyester-based material. The hardness is typically about between 50 and 70 durometer. Polishing pads used with semiconductors are commercially available in a woven polyurethane material. The polishing slurry, which includes an abrasive material, is maintained on the polishing pad to modify the polishing characteristics of the pad in order to enhance the polishing and planarization of the substrate. Although CMP planarization is effective, one recurring problem with CMP processing is the tendency of the process to differentially polish the surface of the substrate and thereby create localized over-polished and under-polished areas across the substrate surface. The difficulty in maintaining a high degree of planarity and uniformity is to control the oxide and metal removal rate constant across the top surface of the substrate as well as preserve a constant oxide removal rate from one substrate to the next, when the substrates are processed in succession.
Layers containing inlaid copper lines frequently show damage after CMP and cleaning. This causes problems with planarization of subsequent layers that are deposited over the damaged copper lines since these layers may now be deposited on a surface with uneven surface imperfections. To circumvent this problem, and to achieve a higher degree of planarization, two or more additional steps may be considered necessary. That is, after the first step, a second polishing would be done using a second CMP tool with preset and distinctive process parameters. These may include different rotation speeds of the polishing platen, and/or a variation in the polishing pressure applied to the substrate, and/or a different slurry formulation, also a different time cycle. Moreover, a third step may be needed to achieve the end result, that is, the substrate may need to be handled again and possibly finished on the first CMP tool. The added steps require excessive substrate handling, and process times.
FIG. 1
shows a Prior Art CMP tool illustrating the arrangement of a chemical mechanical polishing platen used for planarizing a top surface topology of a semiconductor substrate. A polishing pad
40
of a porous material is attached to the upper surface of a polishing platen
42
. The polishing platen is horizontally supported by a platen-rotating shaft
44
, and is rotationally driven, as indicated by the arrow
45
, through the platen-rotating shaft
44
during the polishing operation. A polishing head
46
having a lower surface opposed to the upper surface of the polishing pad
40
on the polishing platen
42
. The lower surface holds a substrate
38
to be polished. An elastomeric material (not shown) having cohesive properties is used on the bottom surface of the polishing head
46
to adhere and hold the substrate
38
to the polishing head. The polishing head
46
is mounted to a rotating shaft
50
and is rotationally driven by the rotating shaft. A slurry
43
is deposited on the polishing pad
40
and carried under the substrate
38
for polishing. The substrate-polishing head
46
also rotates as indicated by arrow
52
, usually in the same direction as the polishing platen
42
at about between 1 to 100 rpm. Because of the rotation of the polishing platen
42
, the substrate
38
traverses a circular path over the polishing pad
40
. A force
48
is also applied in the downward vertical direction against substrate
38
and presses the substrate
38
against the polishing pad
40
as it is being polished. The force is typically in the order of between 0 and 15 psi and is applied by means of the rotating shaft
50
that is attached to the back of substrate polishing head
46
.
SUMMARY OF THE INVENTION
It is therefore a primary object of the present invention to provide a single polishing tool that can improve the uniformity and planarity of the plane of the surface of a substrate being polished.
It is another object of the present invention to provide the means to complete two, or more CMP processes, consecutively as needed, on the same CMP tool.
It is another object of the present invention to provide a CMP polishing tool that reduces the overall handling of the substrate, thereby, reducing CMP process time and number of CMP tools required.
In accordance with the objectives of the present invention, a new CMP tool configuration is provided that improves the planarity of semiconductor surfaces. The single polishing platen of conventional CMP tools is divided into two co-planar arranged platens, each having independent rotational drives and controls. The platens having upper surfaces on which two different polishing pads are attached, for example, the outer most coaxial platen with a first slurry recipe to best planarize, for example, inlaid metal, while the inner pad would be used to polish the insulating layer using a second slurry recipe. The major contributions of this invention is the ability to use one CMP tool for two or more consecutive process steps, and implementing different slurry formulations on the same CMP tool. An annular separation between the coaxial and planar polishing surfaces allows usage of different slurry formulations. The int
Balakumar Subramanian
Feng Chen
Lim Victor Seng-Keong
Proctor Paul
Chartered Semiconductor Manufacturing Ltd.
Nguyen George
Pike Rosemary L. S.
Saile George O.
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