Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1997-10-02
2000-08-15
Thomas, Tom
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257336, 257408, 257900, H01L 2976, H01L 27088
Patent
active
061040630
ABSTRACT:
A transistor and a transistor fabrication method are presented where a sequence of spacers are formed and partially removed upon sidewall surfaces of the gate conductor to produce a graded junction having a relatively smooth doping profile. The spacers include removable and non-removable structures formed on the sidewall surfaces. The adjacent structures have dissimilar etch characteristics compared to each other and compared to the gate conductor. A first dopant (MDD dopant) and a second dopant (source/drain dopant) are implanted into the semiconductor substrate after the respective formation of the removable structure and the non-removable structure. A third dopant (LDD dopant) is implanted into the semiconductor substrate after the removable layer is removed from between the gate conductor and the non-removable structure (spacer). As a result a graded junction is created having higher concentration regions formed outside of lightly concentration regions, relative to the channel area. Such a doping profile provides superior protection against the hot-carrier effect compared to the traditional LDD structure. The smoother the doping profile, the more gradual the voltage drop across the channel/drain junction. A more gradual voltage drop gives rise to a smaller electric field and reduces the hot-carrier effect. Furthermore, the MDD and source/drain implants are performed first, prior to the LDD implant. This allows high-temperature thermal anneals to be performed first, followed by lower temperature anneals second.
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Fulford Jr. H. Jim
Gardner Mark I.
Wristers Derick J.
Advanced Micro Devices , Inc.
Daffer Kevin L.
Nadav Ori
Thomas Tom
LandOfFree
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