Multiple, selectable PLAS having shared inputs and outputs

Electronic digital logic circuitry – Multifunctional or programmable – Array

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326 41, H03K 19173, G06F 738

Patent

active

054971071

ABSTRACT:
Circuitry 10 is provided that contains two (or more) PLA matrix structures 12, 14 which share at least some outputs and are interconnected with a common output structure 18, individual input 30 and output 42, 62 structures, and an appropriate controller 28 for selecting which PLA matrix structure 12, 14 is to be employed. A common input structure 16 may be interconnected with the PLA matrix structures 12, 14 employed. The controller 28 may also be employed to power-down the PLA matrix structures not employed. The controller 28 may be static and select one matrix structure until reset, or dynamic and change as a function of some control signal.

REFERENCES:
patent: 4609986 (1986-09-01), Hartmann et al.
patent: 4758746 (1988-07-01), Birkner et al.
patent: 4847612 (1989-07-01), Kaplinsky
patent: 5023606 (1991-06-01), Kaplinsky
patent: 5028821 (1991-07-01), Kaplinsky
patent: 5220215 (1993-06-01), Douglas et al.

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