Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2007-03-05
2011-11-01
Myers, Paul R (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C713S324000
Reexamination Certificate
active
08051237
ABSTRACT:
An integrated circuit of the type comprises a plurality of units that may act as initiators and targets. At least some of the units are for a first purpose such as a cable modem function and others are for a second purpose such as television data processing. The units are connected together by a interconnect comprising a number of nodes. One of the nodes is configurable such that requests made from initiator units on one side of the node to target units on the other side of the node are not sent to the target units. The units for the first purpose are arranged on the opposite side of the node from those of the second purpose, so that the circuit is effectively configurable into two separate logical partitions, one partition for television data processing and the other partition for cable modem functions.
REFERENCES:
patent: 5226125 (1993-07-01), Balmer et al.
patent: 5815647 (1998-09-01), Buckland et al.
patent: 5862404 (1999-01-01), Onaga
patent: 6073195 (2000-06-01), Okada
patent: 6085328 (2000-07-01), Klein et al.
patent: 6622220 (2003-09-01), Yoshida et al.
patent: 6754716 (2004-06-01), Sharma et al.
patent: 6877061 (2005-04-01), Thibault et al.
patent: 6996651 (2006-02-01), Garinger et al.
patent: 7062559 (2006-06-01), Yoshimura et al.
patent: 7069376 (2006-06-01), Mathewson et al.
patent: 7143196 (2006-11-01), Rimmer et al.
patent: 7277953 (2007-10-01), Wils et al.
patent: 7328298 (2008-02-01), Kamakura et al.
patent: 7366784 (2008-04-01), Ishizaki
patent: 7502842 (2009-03-01), Graham et al.
patent: 7509401 (2009-03-01), Takamoto et al.
patent: 7539124 (2009-05-01), Rhim et al.
patent: 7581021 (2009-08-01), Errickson et al.
patent: 7633955 (2009-12-01), Saraiya et al.
patent: 7733771 (2010-06-01), Clermidy et al.
patent: 7752378 (2010-07-01), Fukumura et al.
patent: 2002/0010881 (2002-01-01), White
patent: 2004/0088599 (2004-05-01), Matsui et al.
patent: 2004/0193906 (2004-09-01), Dar et al.
patent: 2004/0252722 (2004-12-01), Wybenga et al.
patent: 2005/0185642 (2005-08-01), Rhim et al.
patent: 2005/0210333 (2005-09-01), Allue et al.
patent: 2005/0235084 (2005-10-01), Nariai
patent: 2006/0067218 (2006-03-01), Clermidy et al.
patent: 2006/0146857 (2006-07-01), Naik et al.
patent: 2009/0102534 (2009-04-01), Schmid et al.
patent: 2009/0201925 (2009-08-01), Rhim et al.
patent: WO 9832291 (1998-07-01), None
Networks on Chips: Scalable Interconnections for future systems on chips, 2003, Ali et al, pp. 1-6.
Network on a chip, Mar. 15, 2001, School of engineering Jonhoping University Shashi Kumar, pp. 1-19.
Moore's lore, Feb. 8, 2005 Posted by Dana pp. 1-5.
“SonicsMX Smart Interconnect—Product Brief,” URL: http://web.archive.org/web/20050302201409/www.sonicsinc.com/sonics/products/smx/SonicsMX—Product—Brief.pdf, retrieved Jan. 19, 2007, pp. 1-2.
Wingard, D., “A Non-Blocking Intelligent Interconnect for AMBA-Connected SoC's,” URL: http://web.archive.org/web/20051230154938/http://www.ocpip.org/pressroom/schedule/speaking/papers—presentations/Sonics—NonBlockinglntelligentlnterconnect—AMBA.pdf, retrieved Jan. 17, 2007, pp. 1-39.
Jones Andrew Michael
Ryan Stuart Andrew
Baunach Jeremiah J.
Jorgenson Lisa K.
Myers Paul R
Seed IP Law Group PLLC
STMicroelectronics Limited
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