Electrical computers and digital data processing systems: input/ – Access arbitrating – Access prioritizing
Patent
1997-09-05
1999-12-07
Auve, Glenn A.
Electrical computers and digital data processing systems: input/
Access arbitrating
Access prioritizing
710 54, G06F 1300
Patent
active
060000015
ABSTRACT:
A single queuing structure enqueues requests of multiple priorities. The queuing structure is especially well adapted for use with requests that are part of AGP operations. For instance, the queuing structure may enqueue low priority read/flush requests, high priority read/flush requests, low priority write requests, and high priority write requests. The queuing structure may be logically partitioned into logical sub-queues where each sub-queues is associated with requests of a given type and a given priority. Each of the logical sub-queues may be configured to operate in a first-in-first-out (FIFO) fashion. Separate pointers may be maintained for identifying the bottom of each of the logical sub-queues within the single queuing structure.
REFERENCES:
patent: 5557744 (1996-09-01), Kobayakawa et al.
patent: 5649157 (1997-07-01), Williams
patent: 5832304 (1998-11-01), Rauman et al.
patent: 5857086 (1999-01-01), Horan et al.
"Accelerated Graphics Port Interface Specification," Intel Corporation, 1996, pp. 1-151.
Auve Glenn A.
Micron Electronics Inc.
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