Multiple port random access memory

Details Multiple port random access memory Multiple port random access memory

1987-09-08

1989-05-23

Popek, Joseph A.

Static information storage and retrieval

Read/write circuit

Including signal clamping

36523005, G11C 700

Patent

active

048336491

ABSTRACT:
A multiple port memory includes a set of memory units each comprising a set of memory cells, one corresponding to each port. Each cell of a memory unit stores a single data bit and each cell is independently read and write accessed through separate data, address and control busses. The cells of each memory unit are cross-coupled so that when the state of the bit stored by one of the cells of a memory unit is changed when write accessed, the other cells of the memory unit thereafter change the states of their stored bits in the same way.

REFERENCES:
patent: 4541076 (1985-09-01), Bowers et al.
patent: 4623990 (1986-11-01), Allen et al.
patent: 4656614 (1987-04-01), Suzuki
patent: 4719596 (1988-01-01), Bernstein et al.

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