Multiple port memory including merged bipolar transistors

Details Multiple port memory including merged bipolar transistors Multiple port memory including merged bipolar transistors

1989-06-13

1992-02-25

Gossage, Glenn

Static information storage and retrieval

Systems using particular element

Flip-flop

365156, 36523005, 3652256, G11C 11411, G11C 11414

Patent

active

050918818

ABSTRACT:
A multiple port memory includes memory cells with merged PNP and NPN bipolar transistors. Each memory cell has a pair of PNP load transistors and a pair of NPN control transistors in a symmetric arrangement. One or more storage ports provides differential signals on two lines which can modify current flow in the memory cell. Similarly, one or more retrieval ports can be connected to two lines connected to the memory cell for reading current flow in the memory cell.

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patent: 4815038 (1989-03-01), Scharrer et al.
patent: 4817051 (1989-03-01), Chang
patent: 4833649 (1989-05-01), Greub
patent: 4833651 (1989-05-01), Seltzer et al.
"The Twin-Port Memory Cell", K. O'Connor, IEEE Journal of Solid-State Circuits, vol. SC-22, No. 5, 10/87, pp. 712-720.

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