Multiple part compliant interface for packaging of a semiconduct

Details Multiple part compliant interface for packaging of a semiconduct Multiple part compliant interface for packaging of a semiconduct

1997-09-16

1999-06-22

Picardat, Kevin M.

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Including adhesive bonding step

438106, H01L 2144, H01L 2148, H01L 2150

Patent

active

059151706

ABSTRACT:
A method of making a multiple part compliant interface for a microelectronic package including the steps of providing a first microelectronic element having electrically conductive parts, providing an array of curable elastomer support pads in contact with the first microelectronic element, curing the curable elastomer support pads while the support pads remain in contact with the first microelectronic element and providing an array of adhesive pads in contact with the support pads, whereby each adhesive pad is disposed over and in substantial alignment with one of the support pads. A second microelectronic element having electrically conductive parts is then assembled in contact with the array of adhesive pads by abutting the second microelectronic element against the array of adhesive pads and compressing the adhesive pads and support pads between the first and second microelectronic elements. The array of adhesive pads are then cured and the electrically conductive parts of the first and second microelectronic elements are interconnected. The array of support pads define channels running between any two adjacent support pads. A flowable curable elastomer encapsulant may be disposed within the channels after the electrically connecting step. Preferably, the support pads, adhesive pads and the encapsulant comprise substantially similar materials, such as silicone, in order to avoid problems associated with thermal cycling, such as air entrapment and/or voiding.

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