Multiple-output static logic

Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Field-effect transistor

Reexamination Certificate

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C326S119000

Reexamination Certificate

active

07570081

ABSTRACT:
An approach is provided in embodiments of the present invention for building multiple-output static CMOS logic gate circuits that share transistors when computing multiple functions from a common set of inputs. In particular, an approach is provided which includes building multiple-output static NAND gates that compute the subfunctions of three or more inputs and building multiple-output static NOR gates that compute the subfunctions of two or more inputs. The approach also includes building multiple-output static XOR-XNOR gates that are capable of computing two-input XOR, three-input XOR, two-input XNOR, and three-input XNOR, and building multiple-output static Propagate-Generate (PG) compound gates. The approach further includes building carry propagate adders, priority encoders, binary-to-thermometers, decoders, etc. that are capable of using the multiple-output static gates embodied in the present invention.

REFERENCES:
patent: 4851714 (1989-07-01), Hwang
patent: 5719803 (1998-02-01), Naffziger
patent: 2002/0063583 (2002-05-01), Eaton
patent: 2004/0075470 (2004-04-01), Oodaira et al.
patent: 2007/0022246 (2007-01-01), Regev et al.

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