Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2000-09-27
2004-06-08
Padmanabhan, Mano (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C365S185110, C365S185210
Reexamination Certificate
active
06748482
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention pertains generally to computer systems. In particular, it pertains to erasing blocks of flash memory.
2. Description of the Related Art
Flash memory provides a non-volatile fast-access storage medium that can be rewritten in-circuit after first erasing the old data. However, due to the characteristics of flash memory, data can be erased only in blocks, which are typically between 8 kilobytes (KB) and 128 KB in size. Once data has been written into a particular byte location, that data cannot be changed without first erasing the byte, which requires erasing the entire block in which the byte is located. This characteristic of flash memory makes it unsuitable for many applications, but suitable for applications that load a medium-to-large amount of data, retain that data for some period of time without change, and eventually delete that data in its entirety. One such application is a digital audio player.
A digital audio player is a small appliance that contains one or more flash memory components, and stores music or other audio content in one of several industry-standard formats. The user downloads songs or other pieces of music (commonly called “tracks”) one at a time, from the source to the player, until the flash memory is occupied with content. Each downloaded track occupies a number of erase blocks in the flash memory, the number depending on the length of the track. An “erase block” is the smallest unit in the flash memory that can be erased at once, and will be referred to in this document simply as a “block”. The blocks that comprise a track are generally not physically contiguous—one track may occupy blocks that are scattered throughout the flash memory device. However, they are in some way logically connected, for example through a linked-list—each block containing a data structure which points to the location of the next logical block within the track.
After downloading, the user may wish to delete one track and replace it with another. This results in the erasure of all of the blocks associated with that track. This process can take a long time, depending on the number and size of track(s) to be erased. With conventional flash memory technology, a typical 4-minute track can take about 30 seconds to erase. This wait may be unpalatable to the end user.
Currently, flash memory components have one erase command at the user interface. The user (system software) issues a single-block erase command to the device by clocking in a command with a single block address. The device then performs an erase operation on that block. When the erase operation is complete, the system software issues the next erase command for the next block, and so on. Thus, all blocks within a track are erased serially, which causes the excessive erase times noted above.
FIG. 1
illustrates this serial block erase process
10
. At step
11
, the flash memory controller receives a single-block erase command with the address of the block to be erased. At step
12
, a confirm command is received, which triggers the flash memory to erase the specified block at step
13
. Control then returns to step
11
to receive another block Erase command with the block address of the next block to erase. This loop is repeated as many times as there are blocks to erase.
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Finnin et al. “Prefix, infix, postfix, mixfix” http://www.csee.umbc.edu/331/fall00/homework/mixfix.shtml, Fall 2000.*
B. Dipert and M. Levy, “Designing With Flash Memory,” pp. i-XV, 133-185 (Annabooks 1993).
Baker Paul
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Padmanabhan Mano
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