Semiconductor device manufacturing: process – Continuous processing
Patent
1997-07-28
2000-03-07
Niebling, John F.
Semiconductor device manufacturing: process
Continuous processing
438908, 438758, H01L 2131, H01L 21469
Patent
active
060340002
ABSTRACT:
A semiconductor processing system having a holding chamber coupled to a mainframe processing system and at least one loadlock chamber coupled to the holding chamber in which unprocessed wafers are transferred from the loadlock chamber to the holding chamber for subsequent processing by the mainframe system.
REFERENCES:
patent: 4178113 (1979-12-01), Beaver, II et al.
patent: 4693777 (1987-09-01), Hazano et al.
patent: 4759681 (1988-07-01), Nogami
patent: 4785962 (1988-11-01), Toshima
patent: 4801241 (1989-01-01), Zajac et al.
patent: 4828224 (1989-05-01), Crabb et al.
patent: 4836733 (1989-06-01), Hertel et al.
patent: 4863547 (1989-09-01), Shidahara et al.
patent: 4923584 (1990-05-01), Bromhall, Jr. et al.
patent: 4951601 (1990-08-01), Maydan et al.
patent: 4952299 (1990-08-01), Chrisos et al.
patent: 4990047 (1991-02-01), Wagner
patent: 5131460 (1992-07-01), Kreuger
patent: 5186718 (1993-02-01), Tepman et al.
patent: 5227708 (1993-07-01), Lowrance
patent: 5254170 (1993-10-01), Devilbiss et al.
patent: 5261935 (1993-11-01), Ishii et al.
patent: 5292393 (1994-03-01), Maydan et al.
patent: 5443346 (1995-08-01), Murata et al.
patent: 5447409 (1995-09-01), Grunes et al.
patent: 5464313 (1995-11-01), Ohsawa
patent: 5516732 (1996-05-01), Flegal
patent: 5570994 (1996-11-01), Somekh et al.
patent: 5611655 (1997-03-01), Fukasawa et al.
patent: 5615988 (1997-04-01), Wiesler et al.
patent: 5655277 (1997-08-01), Galdos et al.
patent: 5770590 (1988-09-01), Hughes et al.
U.S. application serial No. 08/627,532, filed 4, 1996 (1057/PVD/DV).
Declaration of Thomas B. Brezocsky.
U.S. Patent Application Serial No. 08/627,532, filed Apr. 4, 1996 (Atty. Dkt. 1057/PVD/Dv.
U.S. Patent Application Serial No. 08/610,708, filed Mar. 4, 1996, (Atty. Dkt. 1063/MD/PVD/DV).
"Dry Etching Systems: Gearing Up for Larger Wafers", Semiconductor International Magazine, pp. 48-60, Oct. 1985.
Brezocsky Thomas B.
Davenport Robert E.
Heyder Roger V.
Applied Materials Inc.
Jones Josetta I.
Niebling John F.
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