Multiple-level data compression read mode for memory testing

Details Multiple-level data compression read mode for memory testing Multiple-level data compression read mode for memory testing

2005-05-12

2008-10-07

Louis-Jacques, Jacques (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Error/fault detection technique

C714S718000, C714S732000

Reexamination Certificate

active

07434152

ABSTRACT:
Memory devices having a normal mode of operation and a test mode of operation are useful in quality programs. The test mode of operation includes a data compression test mode having more than one level of compression. The time necessary to read and verify a repeating test pattern can be reduced as only a fraction of the words of the memory device need be read to determine the ability of the memory device to accurately write and store data values. Output is selectively disabled if a bit location for one word of a group of words has a data value differing from any remaining word of its group of words for a number of groups of words.

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