Multiple input frequency locked loop

Details Multiple input frequency locked loop Multiple input frequency locked loop

1996-05-03

1998-05-12

Chin, Stephen

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

455260, H03D 324

Patent

active

057517770

ABSTRACT:
A dual locked loop is disclosed comparing preferably a GPS signal with an E1 signal and the E1 signal with the output of the loop. The GPS signal is low pass filtered to provide a low pass filtered GPS versus E1 signal that is used as a calibration for a closed loop having a second low pass filter for filtering the comparisons of the E1 and the output signal. By appropriately selecting the filter parameters, the output stability can track the stability of the local oscillator driving the NCO for short term stability, the medium term stability of the E1 signal and the long term stability of the GPS signal.

REFERENCES:
patent: 4214205 (1980-07-01), Guest
patent: 4890305 (1989-12-01), Devries
patent: 5220292 (1993-06-01), Bianchini et al.
patent: 5307382 (1994-04-01), Pang
patent: 5311560 (1994-05-01), Tatsumi et al.

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