Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2005-12-06
2005-12-06
Dang, Khanh (Department: 2112)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S038000, C709S239000
Reexamination Certificate
active
06973529
ABSTRACT:
An apparatus, method and program product for selecting paths between a main memory and I/O devices in a data processing system having a main memory for storing data, one or more I/O devices for receiving data from or sending data to the main memory, and an I/O processor (IOP) for controlling I/O operations for sending data between the main memory and the I/O devices. The data processing system includes disparate channels between the IOP and the I/O devices. The disparate channels carry data between the main memory and the I/O devices during the I/O operations. Included is a computer program executed by the IOP for assigning a path weight to selected ones of the disparate channel paths to be used in selecting the next channel path to carry data between the main memory and I/O devices. Each disparate channel type has a different set of criteria for evaluating the path weight.
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IBM Technical Disclosure Bulletin, vol. 39, No. 04, Apr. 1996 Weighted Queueing Algorithm for Efficient Asynchronous Transfer Mode Traffic Shaping, D. F. Barton and R. E. Schroter, pp. 161-163.
Casper Daniel F.
Oakes Kenneth J.
Trotter John S.
Cantor & Colburn LLP
Dang Khanh
International Business Machines - Corporation
Knoll Clifford
Neff Lily
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