Multiple-gate transistor structure and method for fabricating

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257SE29264

Reexamination Certificate

active

07948037

ABSTRACT:
A multiple-gate transistor structure which includes a substrate, source and drain islands formed in a portion of the substrate, a fin formed of a semi-conducting material that has a top surface and two sidewall surfaces, a gate dielectric layer overlying the fin, and a gate electrode wrapping around the fin on the top surface and the two sidewall surfaces separating source and drain islands. In an alternate embodiment, a substrate that has a depression of an undercut or a notch in a top surface of the substrate is utilized.

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patent: 7728360 (2010-06-01), Chen et al.
patent: 2002/0011612 (2002-01-01), Hieda
patent: 2003/0042531 (2003-03-01), Lee
patent: 2004/0036126 (2004-02-01), Chau et al.

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