Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1997-09-30
1998-10-27
Wallace, Valencia
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257341, 257401, 438283, 438587, 438598, H01L 29768
Patent
active
058281029
ABSTRACT:
Disclosed is a MOS transistor having a polysilicon gate structure in which an overlying metal interconnect completely shorts the gate area. In one embodiment, the gate is formed from multiple fingers joined in a serpentine pattern and separated by oxide-filled spaces. Overlying the fingers and oxide-filled spaces is an interconnect comprising a first metal layer and a second metal layer. The first metal layer overlies the fingers and oxide-filled spaces and the second metal layer overlies the first metal layer. Both metal layers form a stack that simultaneously shorts the fingers. Also disclosed is a method of fabricating such a polysilicon gate structure in a MOS transistor using a series of masks. Once the gate and fingers are defined, a conformal oxide is deposited over the fingers and in the spaces between the fingers. The conformal oxide is anisotropically etched to produce a planarized profile of the fingers and oxide-filled spaces. A metal interconnect is formed from a first metal layer and an overlying second metal layer by which all of the fingers are shorted simultaneously.
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Eckert II George C.
National Semiconductor Corporation
Wallace Valencia
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