Multiple clock domain microprocessor

Details Multiple clock domain microprocessor Multiple clock domain microprocessor

2006-08-08

2006-08-08

Butler, Dennis M. (Department: 2115)

Electrical computers and digital processing systems: support

Clock, pulse, or timing signal generation or analysis

Multiple or variable intervals or frequencies

C713S322000, C713S600000

Reexamination Certificate

active

07089443

ABSTRACT:
A multiple clock domain (MCD) microarchitecture uses a globally-asynchronous, locally-synchronous (GALS) clocking style. In an MCD microprocessor each functional block operates with a separately generated clock, and synchronizing circuits ensure reliable inter-domain communication. Thus, fully synchronous design practices are used in the design of each domain.

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