Multiple chip package and IC chips

Details Multiple chip package and IC chips Multiple chip package and IC chips

2008-01-29

2008-01-29

Andujar, Leonardo (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Configuration or pattern of bonds

C327S297000, C257SE23085

Reexamination Certificate

active

11043993

ABSTRACT:
A clock output pad and a return clock receiving pad are disposed on a logic chip at a portion near a side of an integrated circuit chip and a portion near another side of the integrated circuit chip that opposes to the side. A clock receiving pad is disposed on a memory chip at portion near the side and the other side respectively. The clock receiving pad is electrically connected to the clock output pad and the return clock receiving pad. A plurality of clock signals are supplied from the logic chip to the memory chip, and a plurality of return clock signals are returned from the memory chip to the logic chip.

REFERENCES:
patent: 6078514 (2000-06-01), Takemae et al.
patent: 6297842 (2001-10-01), Koizumi et al.
patent: 6519688 (2003-02-01), Lu et al.
patent: 3-198283 (1991-08-01), None
patent: 2000-194594 (2000-07-01), None

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