Multiple bit upset insensitive error detection and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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Reexamination Certificate

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07865805

ABSTRACT:
A method for detecting and correcting bit errors. The method includes the steps of receiving original data, partitioning the memory storage into a first portion and a second portion, storing the original data in the first portion of the memory buffer, modifying the original data into modified data, storing the modified data in the second portion of the memory buffer, comparing the original data with the modified data, combining the original data and the modified data to create a final data stream, and outputting the final data stream. The method may further include the step of calculating and storing parity data.

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patent: 7353356 (2008-04-01), Shirota
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patent: 7574554 (2009-08-01), Tanaka et al.
patent: 7596744 (2009-09-01), Kow et al.
patent: 7689889 (2010-03-01), Cohen

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