Multiple bit output dynamic random-access memory

Static information storage and retrieval – Read/write circuit – Data refresh

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G11C 1140

Patent

active

044532377

ABSTRACT:
A dynamic MOS random-access memory is described which includes a circuit for permitting checking of the on chip refresh counter. The memory also includes a refresh generator, the frequency of which automatically varies to compensate for temperature variations. Other innovations include an arbitration circuit, a hidden refresh function and unique accessing of redundant lines.

REFERENCES:
patent: 3705392 (1972-12-01), Appelt
patent: 3851316 (1974-11-01), Kodama
patent: 4322825 (1982-03-01), Nagami
patent: 4357686 (1982-11-01), Schewneman

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