Multiple address space token designation, protection controls, d

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3642563, 3642551, 364900, 3649612, 364955, G06F 1200, G06F 934

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active

049790986

ABSTRACT:
A method and apparatus is provided to translate the contents of access registers into information for use in performing addressing functions for multiple virtual address spaces. The access registers represent the full addressing capability of the system but do not directly contain the addressing information. The system has a plurality of general purpose registers, a plurality of access registers associated with the general registers, an access list having access list entries which is addressed by the contents of the access register, memory storage for holding address space number second table entries (ASTE), where the contents of the access list entry locate the ASTE and where the ASTE contains the addressing information needed to translate a virtual address when combined with the contents of a general purpose register. Access register translation (ART) consists of the process of determining addressing information by using the access list entry and the ASTE. The results of the ART process are stored in an ART lookaside buffer (ALB) which stores the results of ART while valid for later use.

REFERENCES:
patent: 3787813 (1974-01-01), Cole et al.
patent: 4037214 (1977-07-01), Birney et al.
patent: 4044334 (1977-07-01), Bachman et al.
patent: 4096573 (1978-07-01), Heller et al.
patent: 4136385 (1979-01-01), Gannon et al.
patent: 4268903 (1981-05-01), Miki et al.
patent: 4297743 (1981-10-01), Appell et al.
patent: 4355355 (1982-10-01), Butwell et al.
patent: 4366536 (1982-12-01), Kohn
patent: 4366537 (1982-12-01), Heller et al.
patent: 4430705 (1984-02-01), Cannavino et al.
patent: 4454580 (1984-06-01), Page et al.
patent: 4455602 (1984-06-01), Baxter, III et al.
patent: 4500952 (1985-02-01), Heller et al.
patent: 4521846 (1985-06-01), Scalzi et al.
patent: 4731734 (1988-03-01), Gruner et al.
IBM Technical Disclosure Bulletin--vol. 24, No. 8, Jan. 1982, pp. 4401-4403 entitled "Method of Revoking a Capability Containing a Pointer-Type Identifier Without Accessing the Capability" by K. E. Plambeck.
"IBM System/370 Extended Architecture--Principles of Operation" manual--Publication No. SA22-7085-1.

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