Multimedia address generator

Electrical computers and digital processing systems: memory – Address formation – Generating a particular pattern/sequence of addresses

Reexamination Certificate

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Details

C711S220000, C711S201000

Reexamination Certificate

active

10611286

ABSTRACT:
Embodiments of the invention provide an automatic address generator that generates an address sequence directly using counters that count between predefined start and stop values in accordance with a predefined modes of indexing. The counters support slipping when counting to support convolutional filters in one-dimension (1D) and two-dimension (2D). For 2D indexing, a first counter indexes in the X direction and a second counter indexes in the Y direction in memory. The values from the first and second counter are combined with an offset value to form an address directly to memory.

REFERENCES:
patent: 5867723 (1999-02-01), Chin et al.
patent: 6088046 (2000-07-01), Larson et al.
patent: 6138262 (2000-10-01), Baek
patent: 6195737 (2001-02-01), Hollister et al.
patent: 6564310 (2003-05-01), Nakata et al.
patent: 2003/0088407 (2003-05-01), Hu et al.
patent: 2003/0133333 (2003-07-01), Eldredge et al.

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