Multilevel interconnection structure for integrated circuits and

Details Multilevel interconnection structure for integrated circuits and Multilevel interconnection structure for integrated circuits and

1997-09-26

2000-04-18

Chaudhuri, Olik

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

438623, 438637, 257773, H01L 214763

Patent

active

060514914

ABSTRACT:
In producing a multilevel interconnection structure, an insulator film is placed on and bonded to interconnecting lines laid on an insulating layer on a semiconductor substrate such that all the spacings between the interconnecting lines are left as vacant spaces. For example, the insulator film is a polyimide film or a silicon oxide film. The vacant spaces serve the purpose of reducing capacitance between adjacent interconnecting lines. After forming contact holes in the insulator film and filling the contact holes with a metal, upper-level interconnecting lines are laid on the insulator film.

REFERENCES:
patent: 5407860 (1995-04-01), Stoltz et al.
patent: 5476817 (1995-12-01), Numata
patent: 5488015 (1996-01-01), Havemann et al.
patent: 5510293 (1996-04-01), Numata
patent: 5519250 (1996-05-01), Numata
Jaeger, R.C., Introduction to Microelectronic Fabrication. vol. V. Addison Wesley Publishing Company, Inc. May, 1993. Pp. 147-148.

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