Multilayered ferroelectric-semiconductor memory-device

Details Multilayered ferroelectric-semiconductor memory-device Multilayered ferroelectric-semiconductor memory-device

1995-02-17

1996-06-04

Yoo, Do Hyun

Static information storage and retrieval

Systems using particular element

Ferroelectric

257295, G11C 1122

Patent

active

055240925

ABSTRACT:
Disclosed is a novel ferroelectric-semiconductor interface memory element for a dual-valued, capacitive memory diode of an integrated circuit which consists of a layer of metal electrode, a layer of diffusion barrier conductor, a layer of ferroelectric material, a layer of semiconductor crystal, and a layer of metal electrode. Also disclosed is an alternative, novel, ferroelectric-semiconductor interface memory element for a dual-valued, capacitive memory diode of an integrated circuit which consists of a layer of metal electrode, a layer of diffusion barrier conductor, a layer of ferroelectric material, another layer of diffusion barrier conductor, a layer of semiconductor crystal, and a layer of metal electrode. The two values of maximum capacitance in a single capacitor are achieved in these capacitive diodes by making use of accumulation, depletion, or inversion of semiconductor surface charges as a result of the orientation of the remnant polarization of ferroelectric in proximity.

REFERENCES:
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patent: 5331187 (1994-07-01), Ogawa
patent: 5341325 (1994-08-01), Nakano et al.
patent: 5375082 (1994-12-01), Katti et al.
patent: 5390142 (1995-02-01), Gendlin
patent: 5416042 (1995-05-01), Beach et al.

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