Multilayer resist pattern forming method

Details Multilayer resist pattern forming method Multilayer resist pattern forming method

1994-12-15

1997-05-27

Dang, Thi

Etching a substrate: processes

Masking of a substrate using material resistant to an etchant

Mask is multilayer resist

216 72, 430323, 430325, 438717, 438950, H01L 21302

Patent

active

056329105

ABSTRACT:
A multilayer resist pattern forming method patterns a lower resist layer formed over the stepped surface of a workpiece by a high-speed, highly anisotropic ion mode etching using an intermediate pattern formed by etching an intermediate layer formed by a high-density plasma CVD process as a substantial etching mask. The intermediate layer formed by the high-density plasma CVD process has a dense film quality and highly resistant to ion bombardment. Therefore, the intermediate resist pattern is neither thinned nor contracted and, consequently, the lower resist pattern can be formed precisely in conformity with the design rule. Since the high-density plasma promotes interaction between source gases to enable the intermediate layer to be formed at a comparatively low processing temperature, which prevents damaging the lower resist layer by heat.

REFERENCES:
patent: 4566940 (1986-01-01), Itsumi et al.
patent: 4589952 (1986-05-01), Behringer et al.
patent: 4680084 (1987-07-01), Heimann et al.
patent: 4790903 (1988-12-01), Sugano et al.
patent: 5038713 (1991-08-01), Kawakami et al.
patent: 5324553 (1994-06-01), Ovshinsky et al.

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