Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
1997-06-09
2004-12-14
Cuneo, Kamand (Department: 2827)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S261000, C361S777000, C257S778000
Reexamination Certificate
active
06831234
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a multilayer printed circuit board, and more particularly to a multilayer printed circuit board for mounting of flip chip capable of mounting in a high density and being less in the distortion through curing shrinkage of resin and the position shifting of solder and having an excellent mounting reliability.
2. Description of Related Art
In general, the multilayer printed circuit board for the mounting of flip chip (for example, package) is provided at its mounting surface with a group of solder pads having solder bumps planarly arranged.
The solder pad has a structure that solder having a spherical shape through surface tension is formed on a surface of a flat and disc-shaped conductor as a mounting pad (or land) connected to a given conductor pattern of the wiring substrate, which are electrically connected to external terminals for mounting a package on a mother board or the like through given wirings drawn out from the mounting pad.
In such a structure of the solder pad group, however, it is required to electrically connect a conductor pattern connected to a mounting pad constituting the solder pad located in the inside of the solder pad group to the external terminal through a wiring drawn out from the pad while being detoured from a mounting pad located in the outside of the solder pad group. Therefore, it is necessary to ensure a zone corresponding to a width of the wiring in a gap between pads located in the vicinity of an outer periphery of the wiring substrate, so that there is caused a problem that it is difficult to conduct high integration of electron components (chips).
If it is intended to produce the multilayer print circuit board by so-called build-up method, a portion of locally crowding pads of a metal is formed on the surface of the wiring substrate. Therefore, there is caused a problem that displacement or strain is caused on the substrate surface due to the curing shrinkage of the resin or the difference of thermal expansion coefficient, or cracks resulted therefrom are caused. If such a displacement or strain is existent on the surface of the wiring substrate, the sure surface mounting of the chip onto the substrate can not be carried out, or further if the cracks are created on the wiring substrate, the conductor pattern is broken.
SUMMARY OF THE INVENTION
It is, therefore, an object of the invention to solve the aforementioned problems of the conventional technique and to propose a novel construction of solder pad group in a multilayer printed circuit board for mounting of flip chip advantageous for the high integration of chips and having excellent mounting reliability without causing displacement or strain of substrate surface or cracks resulted therefrom.
The inventors have made various studies in order to achieve the above object and as a result the invention has been accomplished.
According to the invention, there is the provision of a multilayer printed circuit board comprising a core substrate, multilayer wiring layers formed on the substrate by alternately laminating an interlaminar insulating layer and conductor circuit and a group of solder pads having solder bumps planarly arranged on an outermost surface of the multilayer wiring layers, characterized in that (1) the solder pads located from at least one and up to five rows from an outer position of the solder pad group an outer layer pad group are constructed with flat pads connected to conductor pattern located on the outermost surface and solder bumps formed on the surfaces of the pads, while the solder pad group other than these solder pads are constructed with viaholes connected to flat innerlayer pad group located in an inner layer and solder bumps formed in recess portions of the viaholes, and (2) the solder pads located from at least one and up to five rows from an outer position of the innerlayer pad group are constructed with flat pads connected to conductor patterns in the same layer as the innerlayer pad group, while the innerlayer pad groups other than the pads are constituted with flat pads connected to a further innerlayer flat pad group located inward the above innerlayer through viaholes, and (3) the layer having the structure of the above item (2) is at least one layer.
A typical structure of the above multilayer printed circuit board is shown in FIG.
1
.
Thus, the invention proposes a novel construction of solder pad groups in the multilayer printed circuit board for mounting flip chip in which the solder pad group having pads planarly arranged with solder bumps is formed on the outermost surface of the multilayer wiring layers formed on the core substrate by alternately laminating the interlaminar insulating layer and the conductor circuit.
The term “planarly arranged” used herein means not only a method of arranging pads at cell state in X-Y axial directions as shown in
FIG. 2
but also a method of arranging pads at zigzag state every one in X-Y axial directions as shown in FIG.
3
. Particularly, the zigzag arranged form is advantageous in a point that the wiring is easily drawn out from pads of the second to fifth rows from an outer position of pad group toward external terminals.
REFERENCES:
patent: 4866507 (1989-09-01), Jacobs et al.
patent: 5248852 (1993-09-01), Kumagi
patent: 5355019 (1994-10-01), Fuchs
patent: 5433822 (1995-07-01), Mimura et al.
patent: 5442134 (1995-08-01), Miyazaki et al.
patent: 5473120 (1995-12-01), Ito et al.
patent: 5487218 (1996-01-01), Bhatt et al.
patent: 5557844 (1996-09-01), Bhatt et al.
patent: 5646828 (1997-07-01), Degani et al.
patent: 5724232 (1998-03-01), Bhatt et al.
patent: 4327950 (1994-03-01), None
patent: 0536418 (1993-04-01), None
patent: 0559384 (1993-09-01), None
patent: 0713359 (1996-05-01), None
patent: 402100353 (1990-04-01), None
patent: 3-11792 (1991-01-01), None
patent: 4-337695 (1992-11-01), None
patent: 6-53640 (1994-02-01), None
patent: 6-69615 (1994-03-01), None
patent: 6204655 (1994-07-01), None
patent: 6350230 (1994-12-01), None
patent: 7-94855 (1995-04-01), None
patent: 7-106767 (1995-04-01), None
patent: 7106767 (1995-04-01), None
patent: 96/39796 (1996-12-01), None
An English Language Abstract of JP No. 4-337695.
An English Language Abstract of JP No. 7-94855.
An English Language Abstract of JP No. 6-69615.
An English Language Abstract of JP No. 6-53640.
An English Language Abstract of JP No. 6-350230.
An English Language Abstract of JP No. 6-204655.
An English Language Abstract of JP No. 3-11792.
Asai Motoo
Kawamura Yoichiro
Cuneo Kamand
Greenblum & Bernstein P.L.C.
Ibiden Co. Ltd.
Norris Jeremy
LandOfFree
Multilayer printed circuit board does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Multilayer printed circuit board, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multilayer printed circuit board will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3324259