Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2007-02-27
2007-02-27
Lindsay, Jr., Walter (Department: 2812)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S618000, C438S660000, C438S665000, C438S652000, C438S689000, C438S624000, C257S758000, C257S760000, C257S295000, C257SE21575, C257SE21585
Reexamination Certificate
active
11026971
ABSTRACT:
A multilayer interconnection board is disclosed that allows reliable electrical connection between an interconnection having a large width and a large area and a via provided in a via hole formed by pressing a tool against resin. A projecting portion for electrical connection is formed integrally with the insulating member and in a second interconnection groove having a width and an area greater than those of a first interconnection groove. While a first interconnection is being deposited in the first interconnection groove and a second interconnection is being deposited in the second interconnection groove, the projecting portion is formed in the second interconnection groove and a metal plating film is provided on the projecting portion at the same time, so as to electrically connect the second interconnection with the via.
REFERENCES:
patent: 6783652 (2004-08-01), Iijima et al.
patent: 2004/0056289 (2004-03-01), Ooishi
patent: 2004/0188843 (2004-09-01), Wakayama et al.
Muramatsu Shigetsugu
Tanaka Masato
Yamazaki Katsumi
Ahmadi Mohsen
Ladas & Parry LLP
Lindsay, Jr. Walter
Shinko Electric Industries Co. Ltd.
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